Cisco
Sr ASIC DFT Engineer
Bangalore, IndiaPosted today
Skills
hardware design-for-testdft ip developmenttest logic integrationrtl coordinationjtag protocolsscan and bist architecturesmemory bistatpgeda toolstestmaxtetramaxtessent
Job description
We are seeking a Sr ASIC DFT Engineer to implement hardware design-for-test features supporting ATE, in-system test, and diagnostics. Collaborate with multi-functional teams to integrate test logic and develop innovative DFT IP. Ideal for candidates with significant experience in DFT, test, and silicon engineering.