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ASIC DFT Engineer || MBIST, SCAN, ATPG, JTAG || Experience - 4 to 8 years

Bangalore, India4-8 yrsPosted today

Skills

asic design for testhardware design for testjtagscan insertionatpgtestmaxtetramaxtessentgate level simulationvcspost silicon validationate patterns

Job description

Take on the role of ASIC DFT Engineer, contributing to the design and development of advanced hardware platforms for Cisco's core networking products. You will implement DFT features, collaborate with multidisciplinary teams, and integrate testability in chip design. Ideal for candidates with 4–8 years’ experience in ASIC DFT engineering and expertise in DFT, test, and silicon engineering.

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