Phizenix
Role Overview We are seeking a highly experienced Senior or Staff Analog/Mixed-Signal IC Designer to join a world-class semiconductor team. The ideal candidate brings deep expertise in high-speed analog circuit design—spanning wireline transceivers, RFIC front-ends, and precision data converters—and has a track record of delivering silicon in advanced FinFET or SOI processes. This is a high-impact individual contributor or technical lead role focused on next-generation silicon for data communications, wireless, and compute applications. Key Responsibilities Design and verify high-speed analog and mixed-signal circuits including ADCs, DACs, PLLs, clock distribution, laser/modulator drivers, and transimpedance amplifiers (TIAs). Architect and implement wireline SerDes front-ends, optical interconnect ICs, and multi-GHz analog signal chains from concept through tape-out. Develop transistor-level schematics and layouts in advanced FinFET (7–16 nm) or SOI technologies; collaborate with layout engineers to meet stringent PPA targets. Drive pre-silicon simulation and post-silicon bring-up; analyze measured silicon data and iterate on design to close specification gaps. Partner with digital, CAD, and systems teams to define mixed-signal partitioning, interface specs, and shared design methodologies. Produce detailed design documentation and present technical progress to cross-functional stakeholders and leadership. Mentor junior designers and contribute to best-practice development across the organization. Required Qualifications Education & Experience Ph.D. in Electrical Engineering (or related) with 6+ years of analog/mixed-signal IC design experience, OR MS. in Electrical Engineering (or related) with 8+ years of analog/mixed-signal IC design experience. Core Technical Skills Analog / high-speed circuit design: wideband amplifiers, comparators, bias networks, ESD-tolerant I/Os. Laser/modulator drivers and transimpedance amplifiers (TIAs) for optical interconnect applications. High-speed ADC and DAC design (pipeline, SAR, flash, current-steering); including low-speed (LS) converters for control and calibration planes. Clocking systems: DLLs, resonant/CMOS clock distribution, fractional-N synthesis, jitter budgeting, oscillators (LC/Ring). Hands-on design in advanced FinFET nodes (TSMC / Samsung 5–16 nm) and/or Silicon-On-Insulator (SOI) processes. Preferred Qualifications RFIC design experience: LNA, mixer, PA driver, Broadband amplifiers, RF front-end modules. Familiarity with high-speed wireline PHY architectures (56G / 112G PAM-4 SerDes, NRZ). Background in optical module ICs (TOSA/ROSA driver ASICs, coherent DSP interfaces). Proficiency with Cadence Virtuoso, Spectre / APS / Ultrasim, and industry-standard layout tools. Proficient in designing RF passives like transmission lines, inductors, Tcoils, etc using EM tools like EMX, Peakview, etc. Lab characterization skills: oscilloscopes, VNAs, spectrum analyzers, BERT setups. Publications or patents in analog/mixed-signal IC design are a plus.